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                                                       DATE: AUGUST 30, 1988
 
         INPUT 						OUTPUT 
                        **********************
                        *                    *
       body$x$x.dat --->*                    *
      chips_prt.dat --->*      ALIGENP       *--->  xxx.ali
            + /         *                    *
      xxxxxxxxx.vbl --->*                    *
                        **********************
            
TOOL NAME: GENERATE PARTIAL AUTOMATIC LIBRARY INPUT (ALIGENP)
 
FUNCTION: 
        Generates a partial ALI file for use by AUTOLIB.
OPERATING ENVIRONMENT: 
	VMS 4.6 
	VAX/MICROVAX
GENERAL DESCRIPTION: 
    ALIGENP can automatically generate a partial ALI file for use by the
    automatic library generator (AUTOLIB, see AUTOLIB fact sheet).  Once
    the application is invoked the user will be prompted to supply the
    directory path and body file that they would like to generate a 
    partial ALI file from.
    If the user enters a VALID file name then only VALID files will be used
    to generate the partial ALI file.  Based on this information a partial 
    ALI file will be generated containing the following information: 
    dec-part-number, generic name of the component, pin-names, pin-numbers, 
    pin-types, side of body the pin will be located on ($LEFT/$RIGHT), number 
    of pins on the component, and the loading information.
    To generate a VBL with the minimum data requirements from this file the 
    user will have to edit the ALI and add the following information:
    number of gates in the VBL ($NOGATES), width-overhang ($WIDTH_OVERHANG), 
    part gate information ($PRTGAT) and which gate a pin belongs in ($PIN 
    record 4th field).
    If the user enters a VLS file name then only the VBL file will be used
    to generate the partial ALI file.  This file will contain all of the
    information available in the VBL that can be exercised by AUTOLIB.  To
    use this file to generate a VALID component the user will be required
    to add $LEFT, $RIGHT, $SEGM and $SKIP parameters to properly define the 
    graphical representation of the VALID logic body.  The user may also want 
    to resequence the pins to properly reflect the logic body symbol depicted
    in the data books.
    If the user enters both the VALID file name and the VLS file name then
    the application will take the pin names and pin types from the VALID
    files and use them in conjunction with the VLS information.
INTERFACES: 
    VALID GED
    VLS
INPUT FILES/DATA: 
    BODY$X$X.DAT  - graphical information for VALID component
    CHIPS_PRT.DAT - loading information for VALID, power & gnd pins, 
	            pin types
    XXXXXXXXX.DAT - vax layout system library
              
OUTPUT FILES/DATA: 
    XXX.ALI - contains component information
ERROR HANDLING: 
    If a pin is not fully defined then a message detailing what pin is
    incomplete will be written to the screen.
    
    A warning message will be written to the screen to tell the user that
    VALID pin names will override the VLS pin names if both file names
    were given as input to ALIGENP.
STATUS/RESPONSIBLE GROUP:
	
   Developer: Denise Blais
	
   Support: NAC-CAE
TRAINING: NAC-CAE
	  George Berger 
DOCUMENTATION: 
	ALIGENP.UIS  -  DECENT cluster in DOCUMENTATION project under EDBM
	ALIGENP.POST -  DECENT cluster in DOCUMENTATION project under EDBM
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