| DATE: May 18, 1988
INPUT FILES TOOL OUTPUT FILES
**********************
Model libraries --->* *
Module netlist --->* *---> sim capture file
Test Waveforms --->* HILO3 *---> sim display file
sim control file -->* *
* *
**********************
TOOL NAME: HILO3
FUNCTION: logic and timing simulation
OPERATING ENVIRONMENT: HILO3 runs on VAX under VMS. It also runs on
uVAX's. However, for large circuit simulation,
8800 with a sizable memory and disk storage
configuration is the appropriate hardware.
GENERAL DESCRIPTION: Simulate the functions and timings of the module
under development to verify the correctness of the
design.
INPUT FILES: Model library files.
Module netlist in HILO format.
Waveform files for testing the circuit.
Simulation control file.
OUTPUT FILES: Simulation display file for examining simulation output.
Date Capture file, input for DISPRO to examine simulation
outputs.
INTERFACES: None.
STATUS: Verson 3.1J installed on NACAD.
RESPONSIBLE INDIVIDUAL:
Developer: GENRAD, INC
Process: Norbert Eng
TRAINING: Norbert Eng
DOCUMENTATION: HILO3 users Manual
DATE: May 18, 1988
INPUT FILES TOOL OUTPUT FILES
**********************
* *
* *
DATA CAPTURE FILE --->* DISPRO *---> SIM OUTPUT
SETUP FILE(OPTIONAL)-->* *
* *
**********************
TOOL NAME: DISPRO
FUNCTION: EXAMINE SIMULATION OUTPUTS
OPERATING ENVIRONMENT: VAX or uVAX under VMS.
GENERAL DESCRIPTION: Dispro provides logic analyzer type features
to examine simulation outputs. It allows
designers to pick sets of signal and time
frame to analyze simulation results after
each simulation run.
INPUT FILES: Data capture file. File name is defined by users.
OUTPUT FILES: Output goes to screen.
Optionally output to a file. File name is defined by
users.
INTERFACES: None.
STATUS: Verson 3.1J installed on NACAD, comes with HILO3.
RESPONSIBLE INDIVIDUAL:
Developer: GENRAD, INC
Process: Norbert Eng
TRAINING: Norbert Eng
DOCUMENTATION: HILO3 users Manual
DATE: May 18, 1988
INPUT FILES TOOL OUTPUT FILES
**********************
* *
* *
JEDEC FUSE PATTERN -->* JEDECHILO *---> MODEL FILE, .CCT
FILE, .JED * *
* *
**********************
TOOL NAME: JEDECHILO
FUNCTION: PAL SIMULATION MODEL GENERATOR
OPERATING ENVIRONMENT: VAX and uVAX.
GENERAL DESCRIPTION: JEDECHILO generates simulation model for PAL's
from the JEDEC standard fuse pattern file. A
behavioral model with detailed timing is
generated.
INPUT FILES: JEDEC fuse pattern file. This file comes from PAL
assemblers.
OUTPUT FILES: Model circuit file, .CCT.
INTERFACES: None.
STATUS: Verson 01, installed on NACAD
RESPONSIBLE INDIVIDUAL:
Developer: Dave Sitler
Process: Dave Sitler
TRAINING: Dave Sitler
DOCUMENTATION: JEDECHILO.DOC, plus on line HELP.
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