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TOOL NAME: DECPAT
TECHNOLOGY: Electrical
FUNCTION: Timing requirement analyzer
GENERAL DESCRIPTION:
Timing requirement analysis deals with relationships between
state changes within patterns. Since these state relationships
are often available at the specification stage, it is a good idea
to obtain some results from timing requirement analysis before
moving on to logic or timing verification.
There are several ways you can use a timing requirement analyzer.
You can use it to generate new design requirements and to
determine the feasibility of patterns to be used in design
criteria, logic verification, and timing verification for the
system being designed. At a higher level, a timing requrement
analyzer might tell you whether two large systems can work well
together, given the timing requirements for the signals involved.
STATUS: In use
AVAILABILITY:
To request, send mail to ECADSR::HOTLINE
INTERFACES:
DECSIM, AUTODLY, Hammer, any tool that uses pattern files
conforming to these formats
CPU/OPERATING SYSTEM: VMS
SOURCE LANGUAGE: C
ADVANTAGES OF TOOL:
Allows the designer to analyze concurrent timing requirements, to
directly and automatically generate pattern timing, to have a
means of measurement of how well timing requirements are
exercised in pattern timing, and to manipulate pattern files.
LIMITATIONS OF TOOL:
Requires intensive manipulation of timing requirement information
for parts not already included in the LES ECAD library of
dependence/pattern sets.
Graphic editor does not yet support a mouse interface.
RESPONSIBLE ORGANIZATION:
ECAD, send mail to ECADSR::HOTLINE
TRAINING:
Some training available as part of the System Simulation for
Users course, send mail to ECADSR::COURSES for more training
information.
DOCUMENTATION:
To order a copy, send mail to ECADSR::DOCUMENT specifying your
mail stop.
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